The invention is particularly described in relationship to a vacuum-type wafer holder for holding semiconductor wafers in an electrolytic treatment operation. However, the described details of the invention in relationship to particular examples are to convey a full understanding of the features of the invention and are not intended to be limiting to the scope of the invention. Therefore, articles other than semiconductor wafers and handling processes other than electrolytic treatments are seen to be advantageously improved by the invention.
Semiconductor wafers are typically thin (20 mils) slices of single-crystal material which serves as the starting material for various types of semiconductor devices. In a series of production steps, a large number of small semiconductor circuits are formed within the body of such wafers. At the conclusion of the device-forming production steps, the wafers are cut into small chips, each chip being one of the semiconductor devices.
The production steps typically make use of high-resolution photolithographic processing techniques including electrolytic plating and etching steps. Handling the wafers throughout the various process steps is always of concern, in that defects introduced during any of the process steps reduce the yield of good chips from each wafer and thereby raise the cost of the remaining chips. It is, therefore, of utmost concern to minimize the introduction of manufacturing defects.
For example, the yield of good chips is likely to be affected by merely accidentally touching a wafer with bare hands or by contacting a wafer with handling tools in an unusual manner during any one of the various process steps. surface smudges on the wafers or depositions of dust particles on the surfaces of the wafers are typical causes of yield problems. Therefore, automated handling processes have been developed wherein contamination by smudges or dust particles has been minimized. These automated handling processes frequently involve the use of vacuum forces to retain the wafers.
As an example, U.S. Pat. No. 3,558,093 to H. F. Bok relates to a vacuum memory holding device of the type used as a tray for supporting a plurality of wafer-like objects in a spray-coating chamber. The holding device includes a vacuum chamber, one wall of which resiliently collapses against springs as the vacuum is generated in the chamber to hold the vaccum in the chamber.
Another example of a vacuum-operated work holding device is disclosed in U.S. Pat. No. 3,481,858 to H. A. Fromson. According to the Fromson patent, a workpiece to be subjected to an electrolytic operation is held by a suction cup. A vacuum passage terminating at the suction cup is normally closed by a spring-loaded valve and pin combination. When the vacuum cup is pressed against the surface of the article, the pin is pushed into contact with the article and the vacuum valve to the suction cup is opened. The pin also establishes electrical contact with the article which is electrically insulated from the ambient by the surrounding vacuum cup.
In the above-mentioned examples of vacuum holders, maintaining the planarity of the articles is of no concern. However, in processing semiconductor wafers into state-of-the-art integrated circuits, holding the wafers without disturbing their planarity has been recognized as being of significance in photolithographic exposure steps. U.S. Pat. No. 4,213,698 to V. T. Firtion et al. relating to apparatus and method for holding and planarizing thin workpieces, discusses the significance of maintaining the planarity of thin semiconductor wafers in pattern exposure operations.
The above-mentioned Firtion et al. patent discloses a wafer holder featuring a seat of a plurality of pin-like extensions from a baseplate. The ends of the extensions terminate in a plane, and a compressible seal surrounds the extensions. Thus, after a wafer is placed onto the seat, a vacuum is drawn in the space about the extensions. The wafer is drawn against the ends of the extensions and thereby becomes supported with a high degree of planarity. The relatively small support area between the extensions and the wafer minimize the possibility of dirt particles from becoming trapped between the supporting extensions and the wafer in that such dirt particles might disturb the planarity of the wafer.
It now appears that yield-reducing defects may be generated during process steps other than the pattern exposure operations when the wafers are held by vacuum in a manner which tends to induce a bow or other strain into the wafers. It appears, for example, highly advantageous to support the wafers with as little strain on the wafers as possible during all electrolytic treatments such as plating or etching.